TL/DR
The XIAO ESP32-C5 is Seeed Studio’s first XIAO board to support 5 GHz Wi-Fi, combining dual-band Wi-Fi 6, Bluetooth 5.0 LE, and IEEE 802.15.4 for Zigbee and Thread in a 21 × 17.8 mm form factor. It is powered by Espressif’s ESP32-C5 SoC, featuring a 240 MHz RISC-V core, 8 MB Flash, and 8 MB PSRAM.
The board includes a hardware security stack with Secure Boot V2, Flash Encryption, and AES acceleration, making it suitable for production deployments. Priced at approximately $6.90, it supports Arduino, PlatformIO, ESP-IDF, and MicroPython, and is compatible with Seeed’s Grove ecosystem.
Introduction
The XIAO ESP32-C5 is Seeed Studio’s most radio-capable XIAO yet — the first board in the family to support 5 GHz Wi-Fi, sitting alongside 2.4 GHz Wi-Fi 6, Bluetooth 5 LE, and IEEE 802.15.4 for Zigbee and Thread. All of that lives in the classic XIAO stamp-hole form factor: 21 × 17.8 mm. It’s the 15th board in the XIAO line and the third to use an Espressif RISC-V core.
Powered by Espressif’s ESP32-C5 SoC — a chip that only became broadly available in mid-2025 (hence the slightly weird naming order; the C6 board came out first) — it’s a board you can build a product with, not just a prototype.
Full Spec Sheet
| Parameter | Value |
|---|---|
| SoC | Espressif ESP32-C5 (RISC-V) |
| CPU cores | Single-core 32-bit RISC-V HP core up to 240 MHz + LP core up to 48 MHz |
| On-chip SRAM | 384 KB SRAM + 320 KB ROM + 16 KB LP SRAM (stays powered in deep sleep) |
| Flash | 8 MB external Flash |
| PSRAM | 8 MB external PSRAM |
| Wi-Fi | Dual-band Wi-Fi 6 (802.11 a/b/g/n/ac/ax) — 2.4 GHz & 5 GHz. Modes: Station, SoftAP, STA+AP, Promiscuous/Monitor |
| Bluetooth | Bluetooth 5.0 LE + Bluetooth Mesh |
| IEEE 802.15.4 | Zigbee + Thread (via ESP-IDF) |
| IoT protocols | Matter, HomeKit, MQTT |
| GPIO | Up to 11 × GPIO (all PWM-capable) |
| ADC | 5 × 12-bit ADC channels |
| Digital interfaces | 1 × I2C, 1 × SPI, 2 × UART, JTAG (pads on reverse side) |
| ULP GPIO | 7 LP I/O pins (6 accessible on board, 2 on edge pads) |
| USB | USB-C (power + data/programming) |
| Antenna | External RF antenna included, U.FL connector, FPC option — RP-SMA upgrade possible |
| Power input | 5V via USB-C or 3.7V LiPo via battery pads |
| Battery management | Onboard SGM40567 PMIC — 100 mA charging current |
| Battery monitor | GPIO6 (ADC), enabled via GPIO26 |
| 3.3V output | Regulated 3.3V available on pin |
| Deep sleep current | ~10–100 µA depending on configuration |
| User LED | Programmable on GPIO15 (LED_BUILTIN) |
| Buttons | BOOT + RESET (enlarged vs. earlier XIAOs) |
| Form factor | 21 × 17.8 × 1.2 mm, castellated SMD pads |
| Security | AES-128/256, SHA, HMAC, Digital Signature peripheral, Secure Boot V2, Flash encryption, PSRAM encryption, Key Manager |
| Operating temp. | −40°C to +85°C |
| Toolchain support | Arduino IDE (esp32 core ≥ 3.3.5), PlatformIO, ESP-IDF 5+, MicroPython |
| Price (approx.) | ~$6.90 / ~£5.50 |
The Radio Suite
This is the main event. The C5 packs more wireless protocols into a single chip than anything that’s previously worn the XIAO badge.
Wi-Fi 6 — Dual Band (2.4 GHz + 5 GHz)
Think of 2.4 GHz like a motorway at 5 pm on a Friday — every device in the neighbourhood is on it: microwaves, baby monitors, every neighbour’s smart speaker and router. 5 GHz is the quieter B-road. More channels, less interference, and faster throughput for applications that actually push data — OTA updates, streaming sensor feeds, image transfer. The trade-off is range: 5 GHz doesn’t punch through walls quite as convincingly. For bench builds, workshops, and indoor IoT deployments though, it’s a genuinely useful option to have, especially when paired with the included external antenna.
Note: 5 GHz draws more power than 2.4 GHz. If your project is battery-powered and doesn’t need the extra bandwidth, sticking to 2.4 GHz will keep sleep-cycle budgets tidier. The good news: you choose per-connection.
Bluetooth 5.0 LE + IEEE 802.15.4
BLE 5.0 is onboard with Mesh support, coexisting with Wi-Fi via time-division multiplexing. The 802.15.4 subsystem covers both Zigbee and Thread, making this board Matter-compatible out of the box. That’s a lot of protocol coverage for one chip at this price.
Processor & Memory
The ESP32-C5 runs a single-core 32-bit RISC-V HP core clocked up to 240 MHz — quicker than the C6’s 160 MHz. The secondary LP core runs at up to 48 MHz and can keep housekeeping running while the main core sleeps. On-chip you get 384 KB SRAM and 320 KB ROM, plus 16 KB of LP SRAM that stays powered during deep sleep — handy for stashing state data without burning a flash write cycle.
Externally, the board ships with 8 MB Flash and 8 MB PSRAM — the same combo as the XIAO ESP32-S3, and perfectly decent for projects juggling complex protocol stacks or large buffers.
Note for Arduino users: PSRAM needs to be enabled manually — Tools → PSRAM → OPI PSRAM. Some examples (including OpenThread and Matter demos) require it enabled to function correctly.
I/O & Peripherals
For a board this size, the interface count is solid: 11 GPIOs on the edge pads (all PWM-capable), 5 × 12-bit ADC channels, I2C, SPI, two UARTs, and a JTAG debug interface on solder pads on the reverse side.
The lower-power core gets its own 7 ULP I/O pins, 6 of which are accessible on the board. The bottom pads also expose JTAG connections, battery positive/negative, and additional ADC inputs A1–A4. Both BOOT and RESET buttons have been enlarged compared to earlier XIAO boards — a small but appreciated improvement.
Power & Battery Management
Power in via USB-C at 5V for desktop/wired use, or drop a 3.7V LiPo onto the BAT pads on the underside for untethered deployment. The onboard SGM40567 PMIC handles charging at up to 100 mA. Battery voltage is readable in software by enabling GPIO26 and reading the ADC on GPIO6.
Deep sleep current is in the 10–100 µA range depending on configuration — workable for long-life sensor nodes. Wake sources include GPIO triggers (high or low level, configurable) and the timer. Keep the JTAG pins (MTMS, MTDI, MTCK, MTDO) reserved and off the wake-up source list unless you enjoy bricking boards.
Security Features
This is one area where the newer ESP32 family genuinely leaves the original ESP32 in the dust. The C5 includes a proper hardware security stack:
- Secure Boot V2 — cryptographically verified boot chain
- Flash Encryption — AES hardware acceleration of flash contents
- PSRAM Encryption — external PSRAM contents encrypted at rest
- Crypto Accelerators — AES-128/256, SHA-224/256/384/512, HMAC
- Digital Signature Peripheral — hardware-protected signing
- Key Manager — hardware key storage and management
- eFuse — 4 Kbit one-time-programmable configuration
For hobby builds you’ll likely never touch most of this. But if you’re putting something into production — a smart home gateway, an internet-facing sensor, anything that holds credentials — having Secure Boot and Flash Encryption available without bolting on an external secure element is a meaningful advantage.
Toolchain & Ecosystem
Supported toolchains: Arduino IDE (esp32 core ≥ 3.3.5, select XIAO_ESP32C5), PlatformIO, ESP-IDF 5+, and MicroPython. The Seeed wiki launched alongside the board and is unusually thorough for a day-one release.
For Matter or Thread builds, ESP-IDF is the right path. The Arduino core’s OpenThread and Matter examples compile and work, but full production Matter use sits more comfortably in ESP-IDF. The board is compatible with the entire Grove ecosystem (400+ plug-and-play modules), and the castellated stamp-hole design drops straight into a custom PCB as a certified module.
How Does It Compare Within the XIAO Family?
| Board | Best For | vs. C5 |
|---|---|---|
| XIAO ESP32-C3 | Simple Wi-Fi + BLE, tightest budget | C5 wins on speed, memory, and protocol support |
| XIAO ESP32-C6 | Matter-native, Zigbee, Thread, 2.4 GHz Wi-Fi 6 | C5 adds 5 GHz + faster core (240 vs 160 MHz) |
| XIAO ESP32-S3 | Camera, TinyML, dual-core Xtensa compute | C5 wins on radio; S3 wins on parallel compute and camera support |
Who Should Use This?
The XIAO ESP32-C5 makes most sense if you’re building:
- Smart home hubs that need to speak Wi-Fi, BLE, Zigbee, Thread, and Matter all at once
- Sensors or gateways in RF-congested environments where 5 GHz gives cleaner throughput
- Edge gateways that bridge different protocol worlds
- Production-grade IoT nodes where Secure Boot and Flash Encryption are non-negotiable
- Battery-powered deployments with occasional data bursts over Wi-Fi 6
- Scanning tools that need promiscuous mode on both Wi-Fi bands
Verdict
The XIAO ESP32-C5 is a quietly significant board. It doesn’t do anything flashy at first glance — it’s still a tiny, cheap, stamp-hole module that fits on the same footprint as everything else in the XIAO range. But under the hood it’s the most capable wireless device Seeed has shipped in this form factor. Dual-band Wi-Fi 6, full 802.15.4, a 240 MHz RISC-V core, 8 MB PSRAM, and a real hardware security stack for under seven dollars is hard to argue with.
The ecosystem is still maturing and community examples are thinner than for the S3 or original ESP32. But the fundamentals are solid, the Seeed wiki is better than usual for a new launch, and toolchain support is already broad enough for serious work.
Worth having a few in the parts drawer. Genuinely.
